FPGA Implementation for Energy Efficiency in Secure Wireless Sensor Node–A Critical Review

In this paper, we propose the hardware implementation of involutional block ciphers with low energy cost for cryptographic algorithm to WSNs by FPGA implementation. Formerly, microcontroller based sensor nodes are designed like PIC microcontroller, AT Mega128 microcontroller, MSP430.But it have some drawbacks .1) High processing time2) It consumes large amount of energy3) It have less security4) Possible to missing some events5) More time delay6) It affects execution of other programs. This paper insists to use the Field Programmable Gate Array to overcome those problems and enable providing higher performance and more flexibility than microcontroller based sensor nodes. The characteristics of involutional block perform both encryption and decryption by using same circuit.Further,we analyse their energy efficiency in FPGA implementation by choosing two involutional block ciphers KHAZAD and BSPN which considering different design factors such as structure of design and the resource utilization of FPGA.